A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain

Zusatztext

This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation.  The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier.  Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family.

Autorenportrait

Ricardo Filipe Sereno Póvoa is a PhD candidate at the Instituto Superior Técnico/Instituto de Telecomunicações, at the University of Lisbon, in Lisbon, Portugal. João Carlos da Palma Goes is a Professor at the Faculdade de Ciências e Tecnologia, at the New University of Lisbon, Portugal. Nuno Horta (S'89-M'97-SM'11) received the Licenciado, MSc, PhD and Habilitation (Agregação) degrees in electrical engineering from Instituto Superior Técnico (IST), University of Lisbon, Portugal, in 1989, 1992, 1997 and 2014, respectively. In March 1998, he joined the IST Electrical and Computer Engineering Department. Since 1998, he is, also, with Instituto de Telecomunicações, where he is the head of the Integrated Circuits Group. He has supervised more than 90 post graduation works between MSc and PhD theses. He has authored or co-authored more than 150 publications as books, book chapters, international journals papers and conferences papers. He has also participated as researcher or coordinator in several National and European R&D projects. He was General Chair of AACD 2014, PRIME 2016 and SMACD 2016 and was member of the organizing and technical program committees of several other conferences, e.g., IEEE ISCAS, IEEE LASCAS, DATE, NGCAS, etc. He is Associated Editor of Integration, The VLSI Journal, from Elsevier, and usually acts as reviewer of several prestigious publications, e.g., IEEE TCAD, IEEE TEC, IEEE TCAS, ESWA, ASC, etc. His research interests are mainly in data science, computational intelligence, analog IC design automation and computational finance.

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