Hardware Verification with System Verilog

Zusatztext

Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community is turning to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP), with its focus on managing complexity, is ideally suited to this task. With this handbookthe first to focus on applying OOP to SystemVerilogwell show how to manage complexity by using layers of abstraction and base classes. By adapting these techniques, you will write more "reasonable" code, and build efficient and reusable verification components. Both a learning tool and a reference, this handbook contains hundreds of real-world code snippets and three professional verification-system examples. You can copy and paste from these examples, which are all based on an open-source, vendor-neutral framework (with code freely available at www.trusster.com). Learn about OOP techniques such as these: Creating classescode interfaces, factory functions, reuse Connecting classespointers, inheritance, channels Using "correct by construction"strong typing, base classes Packaging it upsingletons, static methods, packages

Weitere Details